LOW POWER MULTI-VALUED ARITHMETIC LOGICAL UNIT DESIGN USING CNFETS
By: MAHOR (LOKESH).
Material type: BookPublisher: DELHI TECHNOLOGICAL UNIVERSITY 2019Description: 63.Subject(s): ELECTRONICS AND COMMUNICATIONDDC classification: 621.382 MAH Dissertation note: M.TECH 2019 MR. PIYUSH TEWARIItem type | Current location | Call number | Status | Date due | Barcode |
---|---|---|---|---|---|
Elec. Thesis & Dissertation |
Delhi Technological University
In case any user is not receiving email during issue and return of books or not getting alerts for return of books .Kindly contact library and update your email and mobile . |
621.382 MAH (Browse shelf) | Not for loan | TD-4680 |
M.TECH 2019 MR. PIYUSH TEWARI
There are no comments for this item.